pd -91885a 6/24/99 www.irf.com 1 IRFBC40A t o -22 0 ab smps mosfet hexfet ? power mosfet l switch mode power supply ( smps ) l uninterruptable power supply l high speed power switching benefits applications l low gate charge qg results in simple drive requirement l improved gate, avalanche and dynamic dv/dt ruggedness l fully characterized capacitance and avalanche voltage and current v dss rds(on) max i d 600v 1.2 w 6.2a typical smps topologies: l single transistor forward s d g parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 6.2 i d @ t c = 100c continuous drain current, v gs @ 10v 3.9 a i dm pulsed drain current ? 25 p d @t c = 25c power dissipation 125 w linear derating factor 1.0 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt ? 6.0 v/ns t j operating junction and -55 to + 150 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torqe, 6-32 or m3 screw 10 lbf?in (1.1n?m) absolute maximum ratings l effective coss specified ( see an 1001) notes ? through ? are on page 8
IRFBC40A 2 www.irf.com parameter min. typ. max. units conditions g fs forward transconductance 3.4 CCC CCC s v ds = 50v, i d = 3.7a q g total gate charge CCC CCC 42 i d = 6.2a q gs gate-to-source charge CCC CCC 10 nc v ds = 480v q gd gate-to-drain ("miller") charge CCC CCC 20 v gs = 10v, see fig. 6 and 13 ? t d(on) turn-on delay time CCC 13 CCC v dd = 300v t r rise time CCC 23 CCC i d = 6.2a t d(off) turn-off delay time CCC 31 CCC r g = 9.1 w t f fall time CCC 18 CCC r d = 47 w ,see fig. 10 ? c iss input capacitance CCC 1036 CCC v gs = 0v c oss output capacitance CCC 136 CCC v ds = 25v c rss reverse transfer capacitance CCC 7.0 CCC pf ? = 1.0mhz, see fig. 5 c oss output capacitance CCC 1487 CCC v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance CCC 36 CCC v gs = 0v, v ds = 480v, ? = 1.0mhz c oss eff. effective output capacitance CCC 48 CCC v gs = 0v, v ds = 0v to 480v ? static @ t j = 25c (unless otherwise specified) dynamic @ t j = 25c (unless otherwise specified) ns parameter typ. max. units e as single pulse avalanche energy ? CCC 570 mj i ar avalanche current ? CCC 6.2 a e ar repetitive avalanche energy ? CCC 13 mj avalanche characteristics s d g parameter min. typ. max. u nits conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.5 v t j = 25c, i s = 6.2a, v gs = 0v ? t rr reverse recovery time CCC 431 647 ns t j = 25c, i f = 6.2a q rr reverse recoverycharge CCC 1.8 2.8 c di/dt = 100a/s ? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) diode characteristics 6.2 25 a parameter typ. max. units r q jc junction-to-case CCC 1.0 r q cs case-to-sink, flat, greased surface 0.50 CCC c/w r q ja junction-to-ambient 62 thermal resistance parameter min. typ. max. u nits conditions v (br)dss drain-to-source breakdown voltage 600 CCC CCC v v gs = 0v, i d = 250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC 0.66 CCC v/c reference to 25c, i d = 1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 1.2 w v gs = 10v, i d = 3.7a ? v gs(th) gate threshold voltage 2.0 CCC 4.0 v v ds = v gs , i d = 250a CCC CCC 25 a v ds = 600v, v gs = 0v CCC CCC 250 v ds = 480v, v gs = 0v, t j = 125c gate-to-source forward leakage CCC CCC 100 v gs = 30v gate-to-source reverse leakage CCC CCC -100 na v gs = -30v i gss i dss drain-to-source leakage current
IRFBC40A www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics, fig 1. typical output characteristics, fig 3. typical transfer characteristics j j 0.01 0.1 1 10 100 0.1 1 10 100 20 s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 0.1 1 10 100 1 10 100 20 s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source volta g e (v) i , drain-to-source current (a) ds d 4.5v 0.1 1 10 100 4.0 5.0 6.0 7.0 8.0 9.0 10.0 v = 50v 20s pulse width ds v , gate-to-source volta g e (v) i , drain-to-source current (a) gs d t = 25 c j t = 150 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 5.9a 6.2a
IRFBC40A 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 8 16 24 32 40 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 5.9a v = 120v ds v = 300v ds v = 480v ds 0.1 1 10 100 0.4 0.6 0.8 1.0 1.2 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 6.2a 0.1 1 10 100 10 100 1000 10000 operation in this area limited by r ds(on) sin g le pulse t t = 150 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 100000 c, capacitance(pf) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd
IRFBC40A www.irf.com 5 fig 10a. switching time test circuit fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10v + - v dd v ds 90% 10% v gs t d(on) t r t d(off) t f 25 50 75 100 125 150 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 t , case temperature ( c) i , drain current (a) c d 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
IRFBC40A 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - 10 v fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 w t p d.u.t l v ds + - v dd driver a 15v 20v fig 12d. typical drain-to-source voltage vs. avalanche current 25 50 75 100 125 150 0 200 400 600 800 1000 1200 1400 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 2.8a 3.9a 6.2a 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 i av , avalanche current ( a) 720 740 760 780 800 820 v dsav , avalanche voltage ( v )
IRFBC40A www.irf.com 7 p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets * v gs = 5v for logic level devices peak diode recovery dv/dt test circuit ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? *
IRFBC40A 8 www.irf.com lead assignments 1 - g a t e 2 - dr a in 3 - source 4 - dr a in - b - 1.32 ( .052 ) 1.22 ( .048 ) 3x 0.55 ( .022 ) 0.46 ( .018 ) 2.92 ( .115 ) 2.64 ( .104 ) 4.69 ( .185 ) 4.20 ( .165 ) 3x 0.93 ( .0 3 7 ) 0.69 ( .0 2 7 ) 4.06 ( .160 ) 3.55 ( .140 ) 1.15 ( .045 ) m in 6.47 ( .2 5 5 ) 6.10 ( .2 4 0 ) 3.78 ( .149 ) 3.54 ( .139 ) - a - 10.54 ( .415 ) 10.29 ( .405 ) 2.87 ( .113 ) 2.62 ( .103 ) 15.24 ( .6 0 0 ) 14.84 ( .5 8 4 ) 14.09 ( .5 5 5 ) 13.47 ( .5 3 0 ) 3x 1.40 ( .055 ) 1.15 ( .045 ) 2.54 ( .100 ) 2x 0.36 ( .0 1 4 ) m b a m 4 1 2 3 notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 3 outline conforms to jedec outline to-220ab. 2 controlling dimension : inch 4 heatsink & lead measurements do n ot include burrs. part number inte rn ationa l re ctifier lo go example : this is an irf1010 w ith ass e mbl y lo t co de 9b1m a ss emb ly l ot co de date code (yyww) yy = year ww = week 9246 irf10 10 9b 1m a part marking information package outline to-220ab outline dimensions are shown in millimeters (inches) world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 ir great britain: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 15 lincoln court, brampton, ontario l6t3z2, tel: (905) 453 2200 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 1 kim seng promenade, great world city west tower, 13-11, singapore 237994 tel: ++ 65 838 4630 ir taiwan: 16 fl. suite d. 207, sec. 2, tun haw south road, taipei, 10673, taiwan tel: 886-2-2377-9936 http://www.irf.com/ data and specifications subject to change without notice. 6/99 to-220ab ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) ? i sd 6.2a, di/dt 80a/s, v dd v (br)dss , t j 150c notes: ? starting t j = 25c, l =29.6mh r g = 25 w , i as = 6.2a. (see figure 12) ? pulse width 300s; duty cycle 2%. ? c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss
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